Integrated circuits, for example, CMOS circuits, with a plurality of op-amps configured in a non-inverting mode with a closed loop gain greater than one are common. For example, in circuits which comprise a plurality of digital-to-analog converters (DACs), the analog output voltages from the DACs are gained up in corresponding op-amps which are configured in a non-inverting mode with a closed loop gain greater than one. In such circuits the analog output of each DAC is applied to the non-inverting input of the corresponding op-amp. A common voltage reference rail is provided in such circuits to provide a voltage reference, typically a ground reference for the op-amps. The op-amps each comprise a feedback circuit having a first impedance element coupled between the op-amp output and the inverting input of the op-amp. A second impedance element couples the inverting input of the corresponding op-amp to the common voltage rail. The first and second impedance elements of each op-amp, which typically are resistive elements, are selected to provide the desired closed loop gain for the op-amp.
In general, the common voltage reference rail is coupled to a voltage reference pin, typically, a ground pin which is provided for coupling the integrated circuit to an external voltage reference, such as a true external ground. However, the coupling between the common voltage reference rail and the ground pin typically exhibits an inherent parasitic impedance, typically, an inherent resistance. The common voltage reference rail is coupled to the pin by a coupling wire, and solder joints are required at the respective opposite ends of the coupling wire for connecting the coupling wire to the common voltage reference rail and the ground pin. The coupling wire itself will have an inherent resistance, and the joints, typically, solder joints which connect the coupling wire to the common voltage reference rail and the ground pin also will exhibit an inherent resistance. Accordingly, when current flows between the common voltage reference rail and the ground pin, a voltage drop develops between the common voltage reference rail and the ground pin. The voltage drop is proportional to the current flowing between the common voltage reference rail and the ground pin. Since the output voltage signals of the respective op-amps vary in response to a change in voltage of input signals to the op-amps, as the digital input words to the respective DACs change with time, the current flowing through the coupling between the common voltage reference rail and the ground pin also varies with time. Accordingly, a time varying voltage is induced on the common voltage reference rail relative to the true ground applied to the ground pin. This, thus, causes the voltage reference on the common voltage reference rail to be a time varying voltage reference. The time varying voltage reference on the common voltage reference rail leads to cross-talk between the outputs of the op-amps, since a change in the digital input word to any one of the DACs affects the output voltages of the op-amps of the other DACs. This is undesirable.
There is therefore a need for an op-amp configured in a non-inverting mode with a closed loop gain greater than one, in which the output signal from the op-amp includes a correction for a time varying voltage reference of the op-amp relative to a true voltage reference for in turn minimising the effect of cross-talk between a plurality of op-amps sharing the same time varying voltage reference. Indeed, there is also a need for an op-amp which is configurable in a non-inverting mode with a closed loop gain greater than one in which the output signal of the op-amp includes a correction for a time varying voltage reference relative to a true voltage reference.
The present invention is directed towards an op-amp configurable in a non-inverting mode with a closed loop gain greater than one with an output signal of the op-amp including a correction for a time varying voltage reference of the op-amp relative to a true voltage reference. The invention is also directed towards a method for providing correction in an output signal of an op-amp configured in a non-inverting mode with a closed loop gain greater than one for a time varying voltage reference of the op-amp relative to a true voltage reference. The invention is also directed towards a circuit comprising a plurality of op-amps, with each op-amp configured in a non-inverting mode with a closed loop gain greater than one and referenced to a time varying voltage reference relative to a true voltage reference, with correction in an output signal of each op-amp for the time varying voltage reference for minimising cross-talk between the outputs of the respective op-amps.